ADC_Window_init
Initialize ADC interface If module is configured to disabled state, the clock to the ADC is disabled if this is supported by the device's clock system.
NVMCTRL_Basic_write_flash_block
Writes a buffer to flash. The flash does not need to be erased beforehand. The flash address to write to does not need to be aligned to any specific boundary.
NVMCTRL_Basic_write_flash_stream
Writes a byte stream to flash. The erase granularity of the flash (i.e. one page) will cause this operation to erase an entire page at a time. To avoid corrupting other flash contents, make sure that the memory range in flash being streamed to is starting on a page boundary, and that enough flash pages are available to hold all data being written.
PWM_Basic_init
Initialize PWM If module is configured to disabled state, the clock to the PWM is disabled if this is supported by the device's clock system.
PWM_Basic_load_duty_cycle_ch0
Load duty cycle register in for channel 0. The physical register may have different names, depending on the hardware. This is not the duty cycle as percentage of the whole period, but the actual counter compare value.
PWM_Basic_load_duty_cycle_ch1
Load duty cycle register in for channel 1. The physical register may have different names, depending on the hardware. This is not the duty cycle as percentage of the whole period, but the actual counter compare value.
SPI_Basic_init
Initialize SPI interface If module is configured to disabled state, the clock to the SPI is disabled if this is supported by the device's clock system.