Atmel AVR UC3 Shutdown Mode

Some Atmel AVR UC3 devices, like UC3 L, supports a special sleep mode called Shutdown. When using this mode the device must be powered by 3.3V on VDDIN and then an internal regulator delivers 1.8V to the core. In addition this the 1.8V can be used to power the VDDIO. When the part goes into Shutdown mode it turns off the internal regulator resulting in both the core and most of the I/O to be powered down. To wake the part up again it must be reset by an external reset on the reset pin. The reset pin is powered by VDDIN while the JTAG lines are powered by VDDIO. For more information on the Shutdown mode, refer to the data sheet of the device being used. Some special considerations are required when debugging targets in such a configuration.


When debugging using aWire the reset line is the only signal line used. VTref (pin 4 in the Atmel AVR ONE! JTAG connector) must be connected to VDDIN (3.3V) for aWire to work.


When debugging using JTAG it is important to also wire the reset line nSRST, pin 6 in the AVR ONE! JTAG connector, so that the AVR ONE! is able to wake the target up from the Shutdown mode. VTtref, pin 4 in the AVR ONE! JTAG connector, must be connected to VDDIO (1.8V). The problem when using JTAG is that the reset pin on the target is powered by VDDIN @ 3.3V, while on the AVR ONE! probe it is powered by VTref @ 1.8 V. This configuration might sound dangerous to the hardware but the AVR ONE! only drives the reset line low, never high, so there should not be any contention. However, there is a strong pullup on the AVR ONE! probe pulling the reset line to 1.8V. This pullup is stronger than the internal pullup in the UC3 target so the reset line will stay at about 2V. To avoid that the target reads this as a low value on reset some action must be taken. There are two options, either add an external 3.3kΩ pullup on the reset line or lower VDDIN on the target to 2.2V or lower.