Status Register (SREG) and Boolean Formula

I T H S V N Z C
– – – ⇔ 0 ⇔ ⇔ –
S
N ⊕ V, for signed tests.
V

0

Cleared.

N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0

Set if the result is $00; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

 sbr r16,3 ; Set bits 0 and 1 in r16
 sbr r17,$F0 ; Set 4 MSB in r17
Words
1 (2 bytes)
Cycles
1
Parent topic: SBR – Set Bits in Register