Status Register (SREG) and Boolean Formula

I	T	H	S	V	N	Z	C
–	–	⇔	⇔	⇔	⇔	⇔	⇔

H

Rd3 • Rr3 + Rr3 • R3 + R3 • Rd3

Set if there was a borrow from bit 3; cleared otherwise.

S

N ⊕ V, for signed tests.

V

Rd7 • Rr7 • R7 + Rd7 • Rr7 • R7

Set if two’s complement overflow resulted from the operation; cleared otherwise.

N

Set if MSB of the result is set; cleared otherwise.

Z

R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0 • Z

Previous value remains unchanged when the result is zero; cleared otherwise.

C

Rd7 • Rr7 + Rr7 • R7 + R7 • Rd7

Set if the absolute value of the contents of Rr plus previous carry is larger than the absolute value of Rd; cleared otherwise.

R (Result) after the operation.

Example:

 ; Compare r3:r2 with r1:r0
 cp r2,r0 ; Compare low byte
 cpc r3,r1 ; Compare high byte
 brne noteq ; Branch if not equal
 ...
noteq: nop ; Branch destination (do nothing)

Words: 1 (2 bytes)
Cycles: 1