Description

Stores one byte indirect with or without displacement from a register to data space. For parts with SRAM, the data space consists of the Register File, I/O memory, and internal SRAM (and external SRAM if applicable). For parts without SRAM, the data space consists of the Register File only. The EEPROM has a separate address space.

The data location is pointed to by the Z (16 bits) Pointer Register in the Register File. Memory access is limited to the current data segment of 64KB. To access another data segment in devices with more than 64KB data space, the RAMPZ in register in the I/O area has to be changed.

The Z-pointer Register can either be left unchanged by the operation, or it can be post-incremented or pre-decremented. These features are especially suited for Stack Pointer usage of the Z-pointer Register, however because the Z-pointer Register can be used for indirect subroutine calls, indirect jumps and table look-up, it is often more convenient to use the X- or Y-pointer as a dedicated Stack Pointer. Note that only the low byte of the Z-pointer is updated in devices with no more than 256 bytes data space. For such devices, the high byte of the pointer is not used by this instruction and can be used for other purposes. The RAMPZ Register in the I/O area is updated in parts with more than 64KB data space or more than 64KB Program memory, and the increment/decrement/displacement is added to the entire 24-bit address on such devices.

Not all variants of this instruction is available in all devices. Refer to the device specific instruction set summary.

The result of these combinations is undefined:

ST Z+, r30

ST Z+, r31

ST -Z, r30

ST -Z, r31

Using the Z-pointer:

 

Operation:

Comment:

(i)

(Z) ←Rr

Z: Unchanged

(ii)

(Z) ← Rr, Z ← Z+1

Z: Post incremented

(iii)

Z ← Z - 1, (Z) ← Rr

Z: Pre decremented

(iv)

(Z+q) ← Rr

Z: Unchanged, q: Displacement

 

Syntax:

Operands:

Program Counter:

(i)

ST Z, Rr

0 ≤ r ≤ 31

PC ← PC + 1

(ii)

ST Z+, Rr

0 ≤ r ≤ 31

PC ← PC + 1

(iii)

ST -Z, Rr

0 ≤ r ≤ 31

PC ← PC + 1

(iv)

STD Z+q, Rr

0 ≤ r ≤ 31, 0 ≤ q ≤ 63

PC ← PC + 1

16-bit Opcode :

(i) 1000 001r rrrr 0000
(ii) 1001 001r rrrr 0001
(iii) 1001 001r rrrr 0010
(iv) 10q0 qq1r rrrr 0qqq