Stores one byte indirect from a register to data space. For parts with SRAM, the data space consists of the Register File, I/O memory, and internal SRAM (and external SRAM if applicable). For parts without SRAM, the data space consists of the Register File only. The EEPROM has a separate address space.
The data location is pointed to by the X (16 bits) Pointer Register in the Register File. Memory access is limited to the current data segment of 64KB. To access another data segment in devices with more than 64KB data space, the RAMPX in register in the I/O area has to be changed.
The X-pointer Register can either be left unchanged by the operation, or it can be post-incremented or pre-decremented. These features are especially suited for accessing arrays, tables, and Stack Pointer usage of the X-pointer Register. Note that only the low byte of the X-pointer is updated in devices with no more than 256 bytes data space. For such devices, the high byte of the pointer is not used by this instruction and can be used for other purposes. The RAMPX Register in the I/O area is updated in parts with more than 64KB data space or more than 64KB Program memory, and the increment/ decrement is added to the entire 24-bit address on such devices.
Not all variants of this instruction is available in all devices. Refer to the device specific instruction set summary.
The result of these combinations is undefined:
ST X+, r26
ST X+, r27
ST -X, r26
ST -X, r27
Using the X-pointer:
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Operation: |
Comment: |
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(i) |
(X) ← Rr |
X: Unchanged |
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(ii) |
(X) ← Rr, X ← X+1 |
X: Post incremented |
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(iii) |
X ← X - 1, (X) ← Rr |
X: Pre decremented |
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Syntax: |
Operands: |
Program Counter: |
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(i) |
ST X, Rr |
0 ≤ r ≤ 31 |
PC ← PC + 1 |
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(ii) |
ST X+, Rr |
0 ≤ r ≤ 31 |
PC ← PC + 1 |
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(iii) |
ST -X, Rr |
0 ≤ r ≤ 31 |
PC ← PC + 1 |
16-bit Opcode:
| (i) | 1001 | 001r | rrrr | 1100 |
| (ii) | 1001 | 001r | rrrr | 1101 |
| (iii) | 1001 | 001r | rrrr | 1110 |