Status Register (SREG) and Boolean Formula

S

N ⊕ V, for signed tests.

V

N ⊕ C, for N and C after the shift.

N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0

Set if the result is $00; cleared otherwise.

C

Rd0

Set if, before the shift, the LSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

ldi r16,$10 ; Load decimal 16 into r16
asr r16 ; r16=r16 / 2
ldi r17,$FC ; Load -4 in r17
asr r17 ; r17=r17/2

Words

1 (2 bytes)

Cycles

1