Status Register (SREG) and Boolean Formula

I T H S V N Z C
0
S
N ⊕ V, for signed tests.
V

0

Cleared.

N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7R6R5R4R3R2R1R0

Set if the result is $00; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

 eor r4,r4 ; Clear r4
 eor r0,r22 ; Bitwise exclusive or between r0 and r22
Words
1 (2 bytes)
Cycles
1