Status Register (SREG) and Boolean Formula

I T H S V N Z C
S
N ⊕ V, for signed tests.
V

N ⊕ C, for N and C after the shift.

N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7R6R5R4R3R2R1R0

Set if the result is $00; cleared otherwise.

C

Rd0

Set if, before the shift, the LSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

 lsr r19 ; Divide r19:r18 by two
 ror r18 ; r19:r18 is an unsigned two-byte integer
 brcc zeroenc1 ; Branch if carry cleared
 asr r17 ; Divide r17:r16 by two
 ror r16 ; r17:r16 is a signed two-byte integer
 brcc zeroenc2 ; Branch if carry cleared
 ...
zeroenc1: nop ; Branch destination (do nothing)
 ...
zeroenc1: nop ; Branch destination (do nothing)
Words
1 (2 bytes)
Cycles
1