Status Register (SREG) and Boolean Formula

S

N ⊕ V, for signed tests.

V

0

Cleared.

N

R7

Set if MSB of the result is set; cleared otherwise.

Z

R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0

Set if the result is $00; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

andi r17,$0F ; Clear upper nibble of r17
andi r18,$10 ; Isolate bit 4 in r18
andi r19,$AA ; Clear odd bits of r19

Words

1 (2 bytes)

Cycles

1