ADC Multiplexer Selection Register

Name:
ADMUX
Offset:
0x7C
Reset:
0x00
Access:
-
Bit76543210
REFS [1:0]ADLARMUX [3:0]
AccessR/WR/WR/WR/WR/WR/WR/W
Reset0000000

Bits 7:6 – REFS [1:0]: Reference Selection

Reference Selection

These bits select the voltage reference for the ADC. If these bits are changed during a conversion, the change will not go into effect until this conversion is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin.

Table 1. ADC Voltage Reference Selection
REFS[1:0] Voltage Reference Selection
00 AREF, Internal Vref turned OFF
01 AVCC with external capacitor at AREF pin
10 Reserved
11 Internal 1.1V voltage reference with external capacitor at AREF pin

Bit 5 – ADLAR: ADC Left Adjust Result

ADC Left Adjust Result

The ADLAR bit affects the presentation of the ADC conversion result in the ADC data register. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC data register immediately, regardless of any ongoing conversions. For a complete description of this bit, refer to ADCL and ADCH.

Bits 3:0 – MUX [3:0]: Analog Channel Selection

Analog Channel Selection

The value of these bits selects which analog inputs are connected to the ADC. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).

Table 2. Input Channel Selection
MUX[3:0] Single Ended Input
0000 ADC0
0001 ADC1
0010 ADC2
0011 ADC3
0100 ADC4
0101 ADC5
0110 ADC6
0111 ADC7
1000 Temperature sensor
1001 Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 1.1V (VBG)
1111 0V (GND)