Sleep Modes

The following Table shows the different sleep modes and their wake up

Table 1. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
	Active Clock Domains				Oscillators	Wake-up Sources
Sleep Mode	clk_CPU	clk_NVM	clk_IO	clk_ADC	Main Clock  Source Enabled	INT0 and Pin Change	ADC	Other I/O	Watchdog Interrupt	VLM Interrupt
Idle			Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
ADC Noise Reduction				Yes	Yes	Yes⁽¹⁾	Yes		Yes	Yes
Standby					Yes	Yes⁽¹⁾			Yes
Power-down						Yes⁽¹⁾			Yes

Note:

For INT0, only level interrupt.

To enter any of the four sleep modes (Idle, ADC Noise Reduction, Power-down or Standby), the Sleep Enable bit in the Sleep Mode Control Register (SMCR.SE) must be written to '1' and a SLEEP instruction must be executed. Sleep Mode Select bits (SMCR.SM) select which sleep mode will be activated by the SLEEP instruction.

If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruction following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.

Note: If a level triggered interrupt is used for wake-up the changed level must be held for some time to wake up the MCU (and for the MCU to enter the interrupt service routine). See External Interrupts for details.