Timer/Counter0 Control Register C
Name:
TCCR0C
Offset:
0x2C
Reset:
0x00
Access:
-
Bit76543210
FOC0AFOC0B
AccessR/WR/W
Reset00

Bit 7 – FOC0A: Force Output Compare for Channel A

Force Output Compare for Channel A

Bit 6 – FOC0B: Force Output Compare for Channel B

Force Output Compare for Channel B

The FOC0A/FOC0B bits are only active when the WGM0[3:0] bits specifies a non-PWM mode. When writing a logical one to the FOC0A/FOC0B bit, an immediate compare match is forced on the Waveform Generation unit. The OC0A/OC0B output is changed according to its COM0x[1:0] bits setting. Note that the FOC0A/FOC0B bits are implemented as strobes. Therefore it is the value present in the COM0x[1:0] bits that determine the effect of the forced compare.

A FOC0A/FOC0B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on Compare match (CTC) mode using OCR0A as TOP. The FOC0A/FOC0B bits are always read as zero.