Xplained Pro Extension Headers

The ATmega324PB Xplained Pro headers EXT1, EXT3, and EXT4 offers access to the I/O of the microcontroller in order to expand the board e.g., by connecting extensions to the board. These headers are based on the standard extension header specified in Table 1. The headers have a pitch of 2.54mm.

Table 1. Extension Header EXT1
EXT1 pin ATmega324PB pin Function Shared functionality
1 [ID] - - Communication line to the ID chip on an extension board
2 [GND] - - Ground
3 [ADC(+)] PA0 ADC0/Y0  
4 [ADC(-)] PA1 ADC1/Y1  
5 [GPIO1] PA2 ADC2/Y2  
6 [GPIO2] PA3 ADC3/Y3  
7 [PWM(+)] PD5 TC1-OCA/X5  
8 [PWM(-)] PD4 TC1-OCB/X4  
9 [IRQ/GPIO] PC1 TW0-SDA/X11 EDBG GPIO2
10 [SPI_SS_B/GPIO] PC0 TW0-SCL/X10  
11 [TWI_SDA] PE5 TW1-SDA EXT1/3/4/EDBG I2C
12 [TWI_SCL] PE6 TW1-SCL EXT1/3/4/EDBG I2C
13 [USART_RX] PD0 U0-RXD  
14 [USART_TX] PD1 U0-TXD  
15 [SPI_SS_A] PB4 S0-SS EDBG GPIO0
16 [SPI_MOSI] PB5 S0-MOSI EXT1/3/4/EDBG SPI
17 [SPI_MISO] PB6 S0-MISO EXT1/3/4/EDBG SPI
18 [SPI_SCK] PB7 S0-SCK EXT1/3/4/EDBG SPI
19 [GND] - - Ground
20 [VCC] - - Power for extension board
Table 2. Extension Header EXT3
EXT3 pin ATmega324PB pin Function Shared functionality
1 [ID] - - Communication line to the ID chip on an extension board
2 [GND] - - Ground
3 [ADC(+)] PC5   Analog header and EDBG JTAG TDI via J200
4 [ADC(-)] PC7   USER LED
5 [GPIO1] PE4 GPIO/AREF EXT4.8
6 [GPIO2] PC2 GPIO EDBG JTAG TCK via J200
7 [PWM(+)] PC4 TC4-OCA EDBG JTAG TDO via J200
8 [PWM(-)] PC3 GPIO EDBG JTAG TMS via J200
9 [IRQ/GPIO] PC6 GPIO USER BUTTON/EDBG GPIO3
10 [SPI_SS_B/GPIO] PB1 GPIO  
11 [TWI_SDA] PE5 TW1-SDA EXT1/3/4/EDBG I2C
12 [TWI_SCL] PE6 TW1-SCL EXT1/3/4/EDBG I2C
13 [USART_RX] PD2 U1-RXD EDBG CDC
14 [USART_TX] PD3 U1-TXD EDBG CDC
15 [SPI_SS_A] PD6 SPI-SS  
16 [SPI_MOSI] PB5 S0-MOSI EXT1/3/4/EDBG SPI
17 [SPI_MISO] PB6 S0-MISO EXT1/3/4/EDBG SPI
18 [SPI_SCK] PB7 S0-SCK EXT1/3/4/EDBG SPI
19 [GND] - - Ground
20 [VCC] - - Power for extension board
Table 3. Extension Header EXT4
EXT4 pin ATmega324PB pin Function Shared functionality
1 [ID] - - Communication line to the ID chip on an extension board
2 [GND] - - Ground
3 [ADC(+)] PA4 ADC4  
4 [ADC(-)] PA5 ADC5  
5 [GPIO1] PA6 ADC6  
6 [GPIO2] PA7 ADC7 EDBG SPI SS via strap J201
7 [PWM(+)] PB3 TC0-OCA/AIN1 ANALOG header
8 [PWM(-)] PE4 AREF EXT3.5
9 [IRQ/GPIO] PB2 INT2/PC1-10 AIN0 EDBG GPIO1/ANALOG header
10 [SPI_SS_B/GPIO] PD7 TC2-OCA  
11 [TWI_SDA] PE5 TW1-SDA EXT1/3/4/EDBG I2C
12 [TWI_SCL] PE6 TW1-SCL EXT1/3/4/EDBG I2C
13 [USART_RX] PE2 U2-RXD  
14 [USART_TX] PE3 U2-TXD  
15 [SPI_SS_A] PB0 SPI SS  
16 [SPI_MOSI] PB5 S0-MOSI EXT1/3/4/EDBG SPI
17 [SPI_MISO] PB6 S0-MISO EXT1/3/4/EDBG SPI
18 [SPI_SCK] PB7 S0-SCK EXT1/3/4/EDBG SPI
19 [GND] - - Ground
20 [VCC] - - Power for extension board