Quad SPI Synchronous Driver

The Quad SPI Interface (QSPI) synchronous driver provides a communication interface to operate a serial flash memory.

The function qspi_sync_serial_run_command can be used to send command (ex: READ, PROGRAM, ERASE, LOCK, etc.) to a serial flash memory.

Summary of the API's Functional Features

The API provides functions to:
  • Initialize and deinitialize the driver and associated hardware

  • Enable or disable QSPI master

  • Execute command in Serial Memory Mode

Summary of Configuration Options

Below is a list of the main QSPI parameters that can be configured in START. Many of these parameters are used by the qspi_sync_init function when initializing the driver and underlying hardware.
  • Select QSPI pins signals

  • Set QSPI baudrate

  • Select QSPI clock polarity and phase

Driver Implementation Description

The driver can be used for SPI serial memory middleware which support flash earse, program and read.

Example of Usage

The following shows a simple example of using the QSPI to send command to a serial memory flash.

The QSPI driver must have been initialized by qspi_sync_init. This initialization will configure the operation of the QSPI master.

          /**
           * Example of using QUAD_SPI_0 to get N25Q256A status value,
           * and check bit 0 which indicate embedded operation is busy or not.
           */
          void QUAD_SPI_0_example(void)
          {
              uint8_t status = 0xFF;
              struct _qspi_command cmd = {
                  .inst_frame.bits.inst_en = 1,
                  .inst_frame.bits.data_en = 1,
                  .inst_frame.bits.tfr_type = QSPI_READ_ACCESS,
                  .instruction = 0x05,
                  .buf_len = 1,
                  .rx_buf = &status,
              };
              qspi_sync_enable(&QUAD_SPI_0);
              while(status & (1 << 0)) {
                  qspi_sync_serial_run_command(&QUAD_SPI_0, &cmd);
              }
              qspi_sync_deinit(&QUAD_SPI_0);
          }
        

Dependencies

  • QSPI peripheral and its related I/O lines and clocks