Features
- Full-duplex or one-wire half-duplex
operation
- Asynchronous or synchronous
operation
- Synchronous clock rates up to
1/2 of the device clock frequency
- Asynchronous clock rates up to
1/8 of the device clock frequency
- Supports serial frames with:
- 5, 6, 7, 8, or 9 data bits
- Optionally even and odd parity
bits
- 1 or 2 stop bits
- Fractional baud rate generator
- Can generate desired baud rate
from any system clock frequency
- No need for external oscillator
with certain frequencies
- Built-in error detection and
correction schemes
- Odd or even parity generation
and parity check
- Data overrun and framing error
detection
- Noise filtering includes false
start bit detection and digital low-pass filter
- Separate interrupts for
- Transmit complete
- Transmit Data Register
empty
- Receive complete
- Multiprocessor communication mode
- Addressing scheme to address a
specific devices on a multi-device bus
- Enable unaddressed devices to
automatically ignore all frames
- Start Frame detection in UART
mode
- Master SPI mode
- Double buffered operation
- Configurable data order
- Operation up to 1/2 of the
peripheral clock frequency
- IRCOM module for IrDA compliant pulse
modulation/demodulation
- LIN slave support
- Auto-baud and Break character detection
- RS-485 support