(NVM) Nonvolatile Memory Control

Nonvolatile memory is separated into three categories: Program Flash Memory (PFM) including User IDs, Configuration Words, and Data Flash Memory (DFM). DFM is also referred to as EEPROM because it is written one byte at a time and the erase before write is automatic. Although User IDs are above the PFM section they are included in the PFM category because the read and write access is identical for both.

The write and erase times are controlled by an on-chip timer. The write and erase voltages are generated by an on-chip charge pump rated to function over the operating voltage range of the device.

PFM and DFM can be protected in two ways: code protection and write protection. Code protection (Configuration bits CP for PFM and CPD for DFM) disables read and write access through an external device programmer. Code protection does not affect the self-write and erase functionality whereas write protection does. Code protection write protection can only be reset by a Bulk Erase performed by an external device programmer. A PFM Bulk Erase clears the program space, Configuration bits, and User IDs. A Bulk Erase only clears DFM if the CPD = 0. When CPD = 1 then bulk erasing DFM requires setting the Program Counter to the DFM area before the Bulk Erase command is issued, and then only the DFM area is cleared. See the programming specification for more details. Write protection prevents writes to NVM areas tagged for protection by the WRTn Configuration bits. Attempts to write a protected location will set the NVMERR bit.

PFM and Configuration Words can be accessed by either the Table Pointer or NVM controls. DFM can be accessed only by the NVM controls. The PFM access is by single byte, single word, or full sector. A sector is 256 bytes (128 PFM words). The sector memory occupies one full bank of RAM space located in the RAM bank following the last occupied GPR bank. Sector memory is also referred to elsewhere in this document as the write block holding registers. The Table Pointer accesses memory by bytes. The NVM control accesses the DFM section by bytes and the other sections by words and sectors.

The NVM controls include five independent access functions with five corresponding control bits. The controls are as follows:

The NVMADR registers determine the address of the memory region being accessed by the NVM control. The TBLPTR registers determine the address of the memory being accessed by the Table Pointer functions. The following table indicates which controls operate in each region.

Table 1. NVM Organization Table
Region Address Range

Table
                                Pointer
                                TBLRD

NVMCON1
RD WR SECRD SECWR SECER
PFM

00 0000h
01 FFFFh

User IDs

20 0000h
20 00FFh

CONFIG

30 0000h
30 000Bh

DFM

31 0000h
31 00FFh