The Configurable Logic Cell (CLCx) module provides programmable logic that
operates outside the speed limitations of software execution. The logic cell takes up to
64input signals and, through the use of
configurable gates, reduces the 64inputs to four logic
lines that drive one of eight selectable single-output logic functions.
Input sources are a combination of the following:
- I/O pins
- Internal clocks
- Peripherals
- Register bits
The output can be directed internally to peripherals and to an output pin.
Important: There are several CLC
instances on this device. Throughout this section, the lower case ‘x’ in register names
is a generic reference to the CLC instance number. For example, the first instance of
the control register is CLC1CON and is generically described in this chapter as
CLCxCON.
The following figure is a simplified diagram showing signal flow through the
CLC. Possible configurations include:
- Combinatorial Logic:
- AND
- NAND
- AND-OR
- AND-OR-INVERT
- OR-XOR
- OR-XNOR
- Latches:
- S-R
- Clocked D with Set and
Reset
- Transparent D with Set
and Reset
- Clocked J-K with Reset
Figure 1. CLC Simplified Block Diagram
Note:
- 1.See Figure 1 for input data selection and gating.
- 2.See Figure 1 for programmable logic functions.