LUT n Control A
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
EDGEDET | CLKSRC | FILTSEL[1:0] | OUTEN | ENABLE | |||
AccessR/W | R/W | R/W | R/W | R/W | R/W | ||
Reset0 | 0 | 0 | 0 | 0 | 0 |
Edge Detection
Value | Description |
---|---|
0 | Edge detector is disabled |
1 | Edge detector is enabled |
Clock Source Selection
This bit selects whether the peripheral clock (CLK_PER) or any input present on input line 2 (IN[2]) is used as clock (CLK_MUX_OUT) for an LUT.
The CLK_MUX_OUT of the even LUT is used for clocking the Sequential block of an LUT pair.
Value | Description |
---|---|
0 | CLK_PER is clocking the LUT |
1 | IN[2] is clocking the LUT |
Filter Selection
These bits select the LUT output filter options:
Value | Name | Description |
---|---|---|
0x0 | DISABLE | Filter disabled |
0x1 | SYNCH | Synchronizer enabled |
0x2 | FILTER | Filter enabled |
0x3 | - | Reserved |
Output Enable
Value | Description |
---|---|
0 | Output to pin disabled |
1 | Output to pin enabled |
LUT Enable
Value | Description |
---|---|
0 | The LUT is disabled |
1 | The LUT is enabled |