Period Buffer Register

This register serves as the buffer for the period register (TCAn.PER). Accessing this register using the CPU or UPDI will affect the PERBV flag.

The TCAn.PERBUFL and TCAn.PERBUFH register pair represents the 16-bit value, TCAn.PERBUF. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.

Name:
PERBUF
Offset:
0x36
Reset:
0xFFFF
Access:
-
Bit15141312111098
PERBUF[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset11111111
Bit76543210
PERBUF[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset11111111

Bits 15:8 – PERBUF[15:8][7:0]: Period Buffer High Byte

Period Buffer High Byte

These bits hold the MSB of the 16-bit period buffer register.

Bits 7:0 – PERBUF[7:0][7:0]: Period Buffer Low Byte

Period Buffer Low Byte

These bits hold the LSB of the 16-bit period buffer register.