Direct Memory Access

SAM D11, D21, L21, L22, and C21 have Direct Memory Access Controllers (DMAC), which can be useful for saving power when the CPU is sleeping. Consider that the CPU has to process the preceding temperature measurements after it has been woken up by the temperature threshold being exceeded. This means that the result of each ADC conversion needs to be saved in the memory. Traditionally the CPU would have been woken up for each ADC conversion, and writing the temperature value to the memory before going back to sleep. DMA is a mechanism for transferring data between memories and peripherals without CPU intervention. A DMA channel has to be set up with a source and destination, as well as a transfer trigger. For the temperature monitoring application the ADC result register would be set up as the source, an SRAM address would be set up as the destination, and the ADC Result Ready Event would be set up as the transfer trigger. When the ADC result is ready, it will trigger a DMA transfer transferring the result into SRAM. For further information about the DMAC, refer to the datasheet.