Some peripherals that can operate in Sleep mode will not operate properly with the Low-Power Sleep mode selected. The Low-Power Sleep mode is intended for use with these peripherals:
- Brown-out Reset (BOR)
- Windowed Watchdog Timer (WWDT)
- External interrupt pin/Interrupt-On-Change pins
- Peripherals that run off external secondary clock source
It is the responsibility of the end user to determine what is acceptable for their application when setting the VREGPM settings in order to ensure operation in Sleep.
Important: The PIC18F67K40 devices do not have a configurable Low-Power
Sleep mode. PIC18LF67K40 devices are unregulated and are
always in the lowest power state when in Sleep, with no wake-up time penalty. These devices
have a lower maximum VDD and I/O voltage than the PIC18F67K40.