ADCON2
'b111
is
a reserved option.Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADPSIS | ADCRS[2:0] | ADACLR | ADMD[2:0] | ||||
AccessR/W | R/W | R/W | R/W | R/W/HC | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
ADC Previous Sample Input Select bits
Value | Description |
---|---|
1 | ADFLTR is transferred to ADPREV at start-of-conversion |
0 | ADRES is transferred to ADPREV at start-of-conversion |
ADC Accumulated Calculation Right Shift Select bits
Value | Name | Description |
---|---|---|
0 to 7 | ADMD =
'b100 |
Low-pass filter time constant is 2ADCRS, filter gain is 1:1 |
0 to 7 | ADMD =' b011 to
'b001 |
The accumulated value is right-shifted by ADCRS (divided by 2ADCRS)(1,2) |
x | ADMD ='b000 to
'b001 |
These bits are ignored |
A/D Accumulator Clear Command bit(3)
Value | Description |
---|---|
1 | ADACC, ADAOV and ADCNT registers are cleared |
0 | Clearing action is complete (or not started) |
ADC Operating Mode Selection bits(4)
Value | Description |
---|---|
111-101 | Reserved |
100 | Low-pass Filter mode |
011 | Burst Average mode |
010 | Average mode |
001 | Accumulate mode |
000 | Basic (Legacy) mode |