SMTxCPW

SMTxCPW

SMT Captured Pulse Width Register

Name:: SMTxCPW
Address:: 0xF10,0xEFE
Reset:
Access:

Bit23	22	21	20	19	18	17	16
CPWU[7:0]
AccessRO	RO	RO	RO	RO	RO	RO	RO
Resetx	x	x	x	x	x	x	x
Bit15	14	13	12	11	10	9	8
CPWH[7:0]
AccessRO	RO	RO	RO	RO	RO	RO	RO
Resetx	x	x	x	x	x	x	x
Bit7	6	5	4	3	2	1	0
CPWL[7:0]
AccessRO	RO	RO	RO	RO	RO	RO	RO
Resetx	x	x	x	x	x	x	x

Bits 23:16 – CPWU[7:0]: Upper Byte of the captured pulse width register

Upper Byte of the captured pulse width register

Bits 15:8 – CPWH[7:0]: High Byte of the captured pulse width register

High Byte of the captured pulse width register

Bits 7:0 – CPWL[7:0]: Lower Byte of the captured pulse width register

Lower Byte of the captured pulse width register