PIR4

Peripheral Interrupt Request (Flag) Register 4
Name:
PIR4
Address:
0xE37
Reset:
Access:
Bit76543210
RC5IFTX5IFRC4IFTX4IFRC3IFTX3IF
AccessRRRRRR
Reset000000

Bit 5 – RC5IF: EUSART5 Receive Interrupt Flag bit

EUSART5 Receive Interrupt Flag bit

ValueDescription
1 The EUSART5 receive buffer, RC5REG, is full (cleared by reading RC5REG)
0 The EUSART5 receive buffer is empty

Bit 4 – TX5IF: EUSART5 Transmit Interrupt Flag bit

EUSART5 Transmit Interrupt Flag bit

ValueDescription
1 The EUSART5 transmit buffer, TX5REG, is empty (cleared by writing TX5REG)
0 The EUSART5 transmit buffer is full

Bit 3 – RC4IF: EUSART4 Receive Interrupt Flag bit

EUSART4 Receive Interrupt Flag bit

ValueDescription
1 The EUSART4 receive buffer, RC4REG, is full (cleared by reading RC4REG)
0 The EUSART4 receive buffer is empty

Bit 2 – TX4IF: EUSART4 Transmit Interrupt Flag bit

EUSART4 Transmit Interrupt Flag bit

ValueDescription
1 The EUSART4 transmit buffer, TX4REG, is empty (cleared by writing TX4REG)
0 The EUSART4 transmit buffer is full

Bit 1 – RC3IF: EUSART3 Receive Interrupt Flag bit

EUSART3 Receive Interrupt Flag bit

ValueDescription
1 The EUSART3 receive buffer, RC3REG, is full (cleared by reading RC3REG)
0 The EUSART3 receive buffer is empty

Bit 0 – TX3IF: EUSART3 Transmit Interrupt Flag bit

EUSART3 Transmit Interrupt Flag bit

ValueDescription
1 The EUSART3 transmit buffer, TX3REG, is empty (cleared by writing TX3REG)
0 The EUSART3 transmit buffer is full