PIR5
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TMR8IF | TMR7IF | TMR6IF | TMR5IF | TMR4IF | TMR3IF | TMR2IF | TMR1IF |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
TMR8 to PR8 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR8 to PR8 match occurred (must be cleared in software) |
| 0 | No TMR8 to PR8 match occurred |
TMR7 to PR7 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR7 to PR7 match occurred (must be cleared in software) |
| 0 | No TMR7 to PR7 match occurred |
TMR6 to PR6 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR6 to PR6 match occurred (must be cleared in software) |
| 0 | No TMR6 to PR6 match occurred |
TMR5 to PR5 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR5 to PR5 match occurred (must be cleared in software) |
| 0 | No TMR5 to PR5 match occurred |
TMR4 to PR4 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR4 to PR4 match occurred (must be cleared in software) |
| 0 | No TMR4 to PR4 match occurred |
TMR3 to PR3 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR3 to PR3 match occurred (must be cleared in software) |
| 0 | No TMR3 to PR3 match occurred |
TMR2 to PR2 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR2 to PR2 match occurred (must be cleared in software) |
| 0 | No TMR2 to PR2 match occurred |
TMR1 to PR1 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR1 to PR1 match occurred (must be cleared in software) |
| 0 | No TMR1 to PR1 match occurred |