The analog input circuitry for single-ended channels is shown in the figure below. An analog source applied to the ADC input pin is subjected to pin capacitance and input leakage of that pin, even if it is not selected as input for the ADC. When a particular channel is selected, it should drive the sample and hold (S/H) capacitor through the series resistance, which is the combined resistance of the input path.
The ADC module is optimized for analog signals with an output impedance of 10 kΩ or less. It is important to ensure that the source impedance is either 10 kΩ or less because the sampling time will be negligible for such a source.
If the source impedance is higher than 10 kΩ then the time to charge the capacitor will increase and the result will not be accurate. For example, if the voltage divider used at the ADC uses a resistor network, make sure that the source impedance is less than 10 kΩ. Low impedance must be used for slowly varying signals since this minimizes the time for charge transfer. Frequency components higher than the Nyquist frequency (fADC/2) must be removed with a low-pass filter, in order to avoid distortion from unpredictable signal convolution. Refer to the device data sheet for impedance value.
