I2C Bus Start/Stop Bits Requirements

Table 1.
Standard Operating Conditions (unless otherwise stated)
Param. No.	Sym.	Characteristic		Min.	Typ. †	Max.	Units	Conditions
SP90*	T_SU:STA	Start condition Setup time	100 kHz mode	4700	—	—	ns	Only relevant for Repeated Start Setup time 400 kHz mode 600 condition
SP90*	T_SU:STA	Start condition Setup time	400 kHz mode	600	—	—	ns
SP91*	T_HD:STA	Start condition Hold time	100 kHz mode	4000	—	—	ns	After this period, the first clock Hold time 400 kHz mode 600 — — pulse is generated
SP91*	T_HD:STA	Start condition Hold time	400 kHz mode	600	—	—	ns
SP92*	T_SU:STO	Stop condition Setup time	100 kHz mode	4700	—	—	ns
SP92*	T_SU:STO	Stop condition Setup time	400 kHz mode	600	—	—	ns
SP93*	T_HD:STO	Stop condition Hold time	100 kHz mode	4000	—	—	ns
SP93*	T_HD:STO	Stop condition Hold time	400 kHz mode	600	—	—	ns
* - These parameters are characterized but not tested.

Figure 1. I²C Bus Start/Stop Bits Timing

Note: Refer to Figure 1 for load conditions.