Pin Change Mask Register 1
Name:
PCMSK1
Offset:
0x6C
Reset:
0x00
Access:
-
Bit76543210
PCINT15PCINT14PCINT13PCINT12PCINT11PCINT10PCINT9PCINT8
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PCINT8, PCINT9, PCINT10, PCINT11, PCINT12, PCINT13, PCINT14, PCINT15: Pin Change Enable Mask

Pin Change Enable Mask

Each PCINT[15:8]-bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[15:8] is set and the PCIE1 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[15:8] is cleared, pin change interrupt on the corresponding I/O pin is disabled.