DDRD

Port D Data Direction Register

When addressing I/O Registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.

Name:: DDRD
Offset:: 0x2A
Reset:: 0x00
Access:: When addressing as I/O Register: address offset is 0x0A

Bit7	6	5	4	3	2	1	0
DDRD7	DDRD6	DDRD5	DDRD4	DDRD3	DDRD2	DDRD1	DDRD0
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0

Bits 0, 1, 2, 3, 4, 5, 6, 7 – DDRD: Port D Data Direction

Port D Data Direction

This bit field selects the data direction for the individual pins in the Port. When a Port is mapped as virtual, accessing this bit field is identical to accessing the actual DIR register for the Port.