OCR1AL – Output Compare Register 1 A Low byte

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.

Name:
OCR1AL
Offset:
0x2A
Reset:
0x00
Access:
When addressing I/O Registers as data space the offset address is 0x4A
Bit76543210
OCR1AL[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 7:0 – OCR1AL[7:0]: Output Compare 1 A Low byte

Output Compare 1 A Low byte

The Output Compare Registers contain a 16-bit value that is continuously compared with the counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the OC1x pin.

The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are written simultaneously when the CPU writes to these registers, the access is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. Refer to Accessing 16-bit Registers for details.