Flushing the Receive Buffer

The Receiver buffer FIFO will be flushed when the Receiver is disabled (i.e., the buffer will be emptied of its contents). Unread data will be lost. If the buffer has to be flushed during normal operation, due to for instance an error condition, read the UDR I/O location until the RXC Flag is cleared. The following code example shows how to flush the receive buffer.

Assembly Code Example(1)

USART_Flush:
   sbis    r16, RXC
   ret
   in      r16, UDR
   rjmp    USART_Flush
void USART_Flush( void )
{
   unsigned char dummy;
   while ( UCSRA & (1<<RXC) ) dummy = UDR;
}
Note: 1. See About Code Examples.