Interrupt Vectors in ATmega8A

Table 1. Reset and Interrupt Vectors
Vector No.	Program Address⁽²⁾	Source	Interrupt Definition
1	0x000⁽¹⁾	RESET	External Pin, Power-on Reset, Brown-out Reset, and Watchdog Reset
2	0x001	INT0	External Interrupt Request 0
3	0x002	INT1	External Interrupt Request 1
4	0x003	TIMER2 COMP	Timer/Counter2 Compare Match
5	0x004	TIMER2 OVF	Timer/Counter2 Overflow
6	0x005	TIMER1 CAPT	Timer/Counter1 Capture Event
7	0x006	TIMER1 COMPA	Timer/Counter1 Compare Match A
8	0x007	TIMER1 COMPB	Timer/Counter1 Compare Match B
9	0x008	TIMER1 OVF	Timer/Counter1 Overflow
10	0x009	TIMER0 OVF	Timer/Counter0 Overflow
11	0x00A	SPI, STC	Serial Transfer Complete
12	0x00B	USART, RXC	USART, Rx Complete
13	0x00C	USART, UDRE	USART Data Register Empty
14	0x00D	USART, TXC	USART, Tx Complete
15	0x00E	ADC	ADC Conversion Complete
16	0x00F	EE_RDY	EEPROM Ready
17	0x010	ANA_COMP	Analog Comparator
18	0x011	TWI	Two-wire Serial Interface
19	0x012	SPM_RDY	Store Program Memory Ready

Note:

1.When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at reset, see Boot Loader Support – Read-While-Write Self-Programming.
2.When the IVSEL bit in GICR is set, Interrupt Vectors will be moved to the start of the boot Flash section. The address of each Interrupt Vector will then be the address in this table added to the start address of the boot Flash section.

The next table shows reset and Interrupt Vectors placement for the various combinations of BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program code can be placed at these locations. This is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the boot section or vice versa.

Table 2. Reset and Interrupt Vectors Placement
BOOTRST⁽¹⁾	IVSEL	Reset Address	Interrupt Vectors Start Address
1	0	0x000	0x001
1	1	0x000	Boot Reset Address + 0x001
0	0	Boot Reset Address	0x001
0	1	Boot Reset Address	Boot Reset Address + 0x001

Note: 1. The Boot Reset Address is shown in table Boot Size Configuration in the Boot Loader Parameters section. For the BOOTRST Fuse “1” means unprogrammed while “0” means programmed.

The most typical and general program setup for the Reset and Interrupt Vector Addresses in ATmega8A is:

`address`	`Labels`	`Code`		`Comments`
`$000`		`rjmp`	`RESET`	`; Reset Handler`
`$001`		`rjmp`	`EXT_INT0`	`; IRQ0 Handler`
`$002`		`rjmp`	`EXT_INT1`	`; IRQ1 Handler`
`$003`		`rjmp`	`TIM2_COMP`	`; Timer2 Compare Handler`
`$004`		`rjmp`	`TIM2_OVF`	`; Timer2 Overflow Handler`
`$005`		`rjmp`	`TIM1_CAPT`	`; Timer1 Capture Handler`
`$006`		`rjmp`	`TIM1_COMPA`	`; Timer1 CompareA Handler`
`$007`		`rjmp`	`TIM1_COMPB`	`; Timer1 CompareB Handler`
`$008`		`rjmp`	`TIM1_OVF`	`; Timer1 Overflow Handler`
`$009`		`rjmp`	`TIM0_OVF`	`; Timer0 Overflow Handler`
`$00a`		`rjmp`	`SPI_STC`	`; SPI Transfer Complete Handler`
`$00b`		`rjmp`	`USART_RXC`	`; USART RX Complete Handler`
`$00c`		`rjmp`	`USART_UDRE`	`; UDR Empty Handler`
`$00d`		`rjmp`	`USART_TXC`	`; USART TX Complete Handler`
`$00e`		`rjmp`	`ADC`	`; ADC Conversion Complete Handler`
`$00f`		`rjmp`	`EE_RDY`	`; EEPROM Ready Handler`
`$010`		`rjmp`	`ANA_COMP`	`; Analog Comparator Handler`
`$011`		`rjmp`	`TWSI`	`; Two-wire Serial Interface Handler`
`$012`		`rjmp`	`SPM_RDY`	`; Store Program Memory Ready Handler`
`;`
`$013`	`RESET:`	`ldi`	`r16,high(RAMEND)`	`; Main program start`
`$014`		`out`	`SPH,r16$013`	`; Set Stack Pointer to top of RAM`
`$015`		`ldi`	`r16,low(RAMEND)$013`
`$016`		`out`	`SPL,r16$013`
`$017`		`sei`		`; Enable interrupts`
`$018`		`<instr>`	`XXX`
`:.`		`:.`	`:.`

When the BOOTRST Fuse is unprogrammed, the boot section size set to 2K bytes and the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical and general program setup for the Reset and Interrupt Vector Addresses is:

`Adddress`	`Labels`	`Code`		`Comments`
`$000`		`rjmp`	`RESET`	`; Reset handler`
`;`
`$001`	`RESET:`	`ldi`	`r16,high(RAMEND)`	`; Main program start`
`$002`		`out`	`SPH,r16`	`; Set Stack Pointer to top of RAM`
`$003`		`ldi`	`r16,low(RAMEND)`
`$004`		`out`	`SPL,r16`
`$005`		`sei`		`; Enable interrupts`
`$006`		`<instr>`	`XXX`
`;`
`.org $c01`
`$c01`		`rjmp`	`EXT_INT0`	`; IRQ Handler`
`$c02`		`rjmp`	`EXT_INT1`	`; IRQ\| Handler`
`:.`		`:.`	`:.`
`$c12`		`rjmp`	`SPM_RDY`	`; Store Program Memory Ready Handler`

When the BOOTRST Fuse is programmed and the boot section size set to 2K bytes, the most typical and general program setup for the Reset and Interrupt Vector Addresses is:

`Address`	`Labels`	`Code`		`Comments`
`.org $001`
`$001`		`rjmp`	`EXT_INT0`	`; IRQ0 Handler`
`$002`			`EXT_INT1`	`; IRQ1 Handler`
`:.`		`:.`	`:.`	`;`
`$012`		`rjmp`	`SPM_RDY`	`; Store Program Memory Handler`
`;`
`.org $c00`
`$c00`		`rjmp`	`RESET`	`; Reset handler`
`;`
`$c01`	`RESET:`	`ldi`	`r16,high(RAMEND)`	`; Main program start`
`$c02`		`out`	`SPH,r16`	`; Set Stack Pointer to top of RAM`
`$c03`		`ldi`	`r16,low(RAMENSPL,r16D)`
`$c04`		`out`	`SPL,r16`
`$c05`		`sei`		`; Enable interrupts`
`$c06`		`<instr>`	`XXX`

When the BOOTRST Fuse is programmed, the boot section size set to 2K bytes, and the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical and general program setup for the Reset and Interrupt Vector Addresses is:

`Address`	`Labels`	`Code`		`Comments`
`;`
`.org $c00`
`$c00`		`rjmp`	`RESET`	`; Reset handler`
`$c01`		`rjmp`	`EXT_INT0`	`; IRQ0 Handler`
`$c02`		`rjmp`	`EXT_INT1`	`; IRQ1 Handler`
`:.`		`:.`	`:.`
`$c12`		`rjmp`	`SPM_RDY`	`; Store Program Memory Ready Handler`
`$c13`	`RESET:`	`ldi`	`r16,high(RAMEND)`	`; Main program start`
`$c14`		`out`	`SPH,r16`	`; Set Stack Pointer to top of RAM`
`$c15`		`ldi`	`r16,low(RAMEND)`
`$c16`		`out`	`SPL,r16`
`$c17`		`sei`		`; Enable interrupts`
`$c18`		`<instr>`	`XXX`