Alternate Functions of Port D

The Port D pins with alternate functions are shown in the table below:

Table 1. Port D Pins Alternate Functions
Port Pin Alternate Function
PD7 AIN1 (Analog Comparator Negative Input)

PD6 AIN0 (Analog Comparator Positive Input)

PD5 T1 (Timer/Counter 1 External Counter Input)

PD4 XCK (USART External Clock Input/Output)
T0 (Timer/Counter 0 External Counter Input)

PD3 INT1 (External Interrupt 1 Input)

PD2 INT0 (External Interrupt 0 Input)

PD1 TXD (USART Output Pin)

PD0 RXD (USART Input Pin)


The alternate pin configuration is as follows:

• AIN1 – Port D, Bit 7

AIN1, Analog Comparator Negative Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.

• AIN0 – Port D, Bit 6

AIN0, Analog Comparator Positive Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.

• T1 – Port D, Bit 5

T1, Timer/Counter1 counter source.

• XCK/T0 – Port D, Bit 4

XCK, USART external clock.

T0, Timer/Counter0 counter source.

• INT1 – Port D, Bit 3

INT1, External Interrupt source 1: The PD3 pin can serve as an external interrupt source.

• INT0 – Port D, Bit 2

INT0, External Interrupt source 0: The PD2 pin can serve as an external interrupt source.

• TXD – Port D, Bit 1

TXD, Transmit Data (Data output pin for the USART). When the USART Transmitter is enabled, this pin is configured as an output regardless of the value of DDD1.

• RXD – Port D, Bit 0

RXD, Receive Data (Data input pin for the USART). When the USART Receiver is enabled this pin is configured as an input regardless of the value of DDD0. When the USART forces this pin to be an input, the pull-up can still be controlled by the PORTD0 bit.

The tables below relate the alternate functions of Port D to the overriding signals shown in figure Figure 1.

Table 2. Overriding Signals for Alternate Functions PD7:PD4
Signal
Name PD7/AIN1
 PD6/AIN0 PD5/T1 PD4/XCK/
T0
PUOE 0 0 0 0
PUO 0 0 0 0
OOE 0 0 0 0
OO 0 0 0 0
PVOE 0 0 0 UMSEL
PVO 0 0 0 XCK OUTPUT
DIEOE 0 0 0 0
DIEO 0 0 0 0
DI T1 INPUT XCK INPUT / T0 INPUT
AIO AIN1 INPUT AIN0 INPUT
Table 3. Overriding Signals for Alternate Functions in PD3:PD0
Signal
Name PD3/INT1 PD2/INT0 PD1/TXD PD0/RXD
PUOE 0 0 TXEN RXEN
PUO 0 0 0 PORTD0 • PUD
OOE 0 0 TXEN RXEN
OO 0 0 1 0
PVOE 0 0 TXEN 0
PVO 0 0 TXD 0
DIEOE INT1 ENABLE INT0 ENABLE 0 0
DIEO 1 1 0 0
DI 
INT1 INPUT INT0 INPUT RXD
AIO