#ifndef _AVR_SLEEP_H_
#define _AVR_SLEEP_H_ 1
#include <avr/io.h>
#include <stdint.h>
#if defined(SLEEP_CTRL)
#define _SLEEP_CONTROL_REG SLEEP_CTRL
#define _SLEEP_ENABLE_MASK SLEEP_SEN_bm
#elif defined(SMCR)
#define _SLEEP_CONTROL_REG SMCR
#define _SLEEP_ENABLE_MASK _BV(SE)
#elif defined(__AVR_AT94K__)
#define _SLEEP_CONTROL_REG MCUR
#define _SLEEP_ENABLE_MASK _BV(SE)
#else
#define _SLEEP_CONTROL_REG MCUCR
#define _SLEEP_ENABLE_MASK _BV(SE)
#endif
#if defined(__AVR_ATmega161__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_PWR_DOWN 1
#define SLEEP_MODE_PWR_SAVE 2
#define set_sleep_mode(mode) \
do { \
MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_PWR_DOWN || (mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM1) : 0)); \
EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM0) : 0)); \
} while(0)
#elif defined(__AVR_ATmega162__) \
|| defined(__AVR_ATmega8515__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_PWR_DOWN 1
#define SLEEP_MODE_PWR_SAVE 2
#define SLEEP_MODE_ADC 3
#define SLEEP_MODE_STANDBY 4
#define SLEEP_MODE_EXT_STANDBY 5
#define set_sleep_mode(mode) \
do { \
MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_IDLE ? 0 : _BV(SM1))); \
MCUCSR = ((MCUCSR & ~_BV(SM2)) | ((mode) == SLEEP_MODE_STANDBY || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM2) : 0)); \
EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM0) : 0)); \
} while(0)
#elif defined(__AVR_AT90S2313__) \
|| defined(__AVR_AT90S2323__) \
|| defined(__AVR_AT90S2333__) \
|| defined(__AVR_AT90S2343__) \
|| defined(__AVR_AT43USB320__) \
|| defined(__AVR_AT43USB355__) \
|| defined(__AVR_AT90S4414__) \
|| defined(__AVR_AT90S4433__) \
|| defined(__AVR_AT90S8515__) \
|| defined(__AVR_ATtiny22__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_PWR_DOWN _BV(SM)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~_BV(SM)) | (mode)); \
} while(0)
#elif defined(__AVR_ATA6616C__) \
|| defined(__AVR_ATA6617C__) \
|| defined(__AVR_ATA664251__) \
|| defined(__AVR_ATtiny167__) \
|| defined(__AVR_ATtiny87__) \
|| defined(__AVR_ATtiny441__) \
|| defined(__AVR_ATtiny828__) \
|| defined(__AVR_ATtiny841__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
} while(0)
#elif defined(__AVR_AT90S4434__) \
|| defined(__AVR_ATA5505__) \
|| defined(__AVR_ATA5272__) \
|| defined(__AVR_AT76C711__) \
|| defined(__AVR_AT90S8535__) \
|| defined(__AVR_ATmega103__) \
|| defined(__AVR_ATmega161__) \
|| defined(__AVR_ATmega163__) \
|| defined(__AVR_ATmega16HVB__) \
|| defined(__AVR_ATmega16HVBREVB__) \
|| defined(__AVR_ATmega32HVB__) \
|| defined(__AVR_ATmega32HVBREVB__) \
|| defined(__AVR_ATtiny13__) \
|| defined(__AVR_ATtiny13A__) \
|| defined(__AVR_ATtiny15__) \
|| defined(__AVR_ATtiny24__) \
|| defined(__AVR_ATtiny24A__) \
|| defined(__AVR_ATtiny44__) \
|| defined(__AVR_ATtiny44A__) \
|| defined(__AVR_ATtiny84__) \
|| defined(__AVR_ATtiny84A__) \
|| defined(__AVR_ATtiny25__) \
|| defined(__AVR_ATtiny45__) \
|| defined(__AVR_ATtiny48__) \
|| defined(__AVR_ATtiny85__) \
|| defined(__AVR_ATtiny88__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
} while(0)
#elif defined(__AVR_ATmega16HVA__) \
|| defined(__AVR_ATmega8HVA__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_PWR_OFF _BV(SM2)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_ATmega406__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_PWR_OFF _BV(SM2)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_ATtiny2313__) \
|| defined(__AVR_ATtiny2313A__) \
|| defined(__AVR_ATtiny4313__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_PWR_DOWN (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_STANDBY _BV(SM1)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
} while(0)
#elif defined(__AVR_AT94K__) \
|| defined(__AVR_ATmega64HVE__) \
|| defined(__AVR_ATmega64HVE2__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
} while(0)
#elif defined(__AVR_ATtiny26__) \
|| defined(__AVR_ATtiny261__) \
|| defined(__AVR_ATtiny261A__) \
|| defined(__AVR_ATtiny461__) \
|| defined(__AVR_ATtiny461A__) \
|| defined(__AVR_ATtiny861__) \
|| defined(__AVR_ATtiny861A__) \
|| defined(__AVR_ATtiny43U__) \
|| defined(__AVR_ATtiny1634__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_STANDBY (_BV(SM0) | _BV(SM1))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
} while(0)
#elif defined(__AVR_AT90PWM216__) \
|| defined(__AVR_AT90PWM316__) \
|| defined(__AVR_AT90PWM161__) \
|| defined(__AVR_AT90PWM81__) \
|| defined(__AVR_AT90PWM1__) \
|| defined(__AVR_AT90PWM2__) \
|| defined(__AVR_AT90PWM2B__) \
|| defined(__AVR_AT90PWM3__) \
|| defined(__AVR_AT90PWM3B__) \
|| defined(__AVR_ATmega32M1__) \
|| defined(__AVR_ATmega16M1__) \
|| defined(__AVR_ATmega64M1__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_AT90USB1286__) \
|| defined(__AVR_AT90USB1287__) \
|| defined(__AVR_AT90USB646__) \
|| defined(__AVR_AT90USB647__) \
|| defined(__AVR_ATA6614Q__) \
|| defined(__AVR_ATmega128__) \
|| defined(__AVR_ATmega128A__) \
|| defined(__AVR_ATmega1280__) \
|| defined(__AVR_ATmega1281__) \
|| defined(__AVR_ATmega1284__) \
|| defined(__AVR_ATmega1284P__) \
|| defined(__AVR_ATmega128RFA1__) \
|| defined(__AVR_ATmega128RFR2__) \
|| defined(__AVR_ATmega1284RFR2__) \
|| defined(__AVR_ATmega16__) \
|| defined(__AVR_ATmega16A__) \
|| defined(__AVR_ATmega162__) \
|| defined(__AVR_ATmega164A__) \
|| defined(__AVR_ATmega164P__) \
|| defined(__AVR_ATmega164PA__) \
|| defined(__AVR_ATmega168A__) \
|| defined(__AVR_ATmega168P__) \
|| defined(__AVR_ATmega168PA__) \
|| defined(__AVR_ATmega168PB__) \
|| defined(__AVR_ATmega16HVA2__) \
|| defined(__AVR_ATmega16U4__) \
|| defined(__AVR_ATmega2560__) \
|| defined(__AVR_ATmega2561__) \
|| defined(__AVR_ATmega256RFR2__) \
|| defined(__AVR_ATmega2564RFR2__) \
|| defined(__AVR_ATmega32__) \
|| defined(__AVR_ATmega32A__) \
|| defined(__AVR_ATmega323__) \
|| defined(__AVR_ATmega324A__) \
|| defined(__AVR_ATmega324P__) \
|| defined(__AVR_ATmega324PA__) \
|| defined(__AVR_ATmega328__) \
|| defined(__AVR_ATmega328P__) \
|| defined(__AVR_ATmega32C1__) \
|| defined(__AVR_ATmega32U4__) \
|| defined(__AVR_ATmega32U6__) \
|| defined(__AVR_ATmega48A__) \
|| defined(__AVR_ATmega48PA__) \
|| defined(__AVR_ATmega48PB__) \
|| defined(__AVR_ATmega48P__) \
|| defined(__AVR_ATmega64__) \
|| defined(__AVR_ATmega64A__) \
|| defined(__AVR_ATmega640__) \
|| defined(__AVR_ATmega644__) \
|| defined(__AVR_ATmega644A__) \
|| defined(__AVR_ATmega644P__) \
|| defined(__AVR_ATmega644PA__) \
|| defined(__AVR_ATmega64C1__) \
|| defined(__AVR_ATmega64RFR2__) \
|| defined(__AVR_ATmega644RFR2__) \
|| defined(__AVR_ATmega8515__) \
|| defined(__AVR_ATmega8535__) \
|| defined(__AVR_ATmega88A__) \
|| defined(__AVR_ATmega88P__) \
|| defined(__AVR_ATmega88PA__) \
|| defined(__AVR_ATmega88PB__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2))
#define SLEEP_MODE_EXT_STANDBY (_BV(SM0) | _BV(SM1) | _BV(SM2))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_ATmega8A__) \
|| defined(__AVR_ATmega8__) \
|| defined(__AVR_ATmega6450A__) \
|| defined(__AVR_ATmega6450P__) \
|| defined(__AVR_ATmega645A__) \
|| defined(__AVR_ATmega645P__) \
|| defined(__AVR_ATmega3250A__) \
|| defined(__AVR_ATmega3250PA__) \
|| defined(__AVR_ATmega325A__) \
|| defined(__AVR_ATmega325PA__) \
|| defined(__AVR_ATmega165A__) \
|| defined(__AVR_ATmega165P__) \
|| defined(__AVR_ATmega165PA__) \
|| defined(__AVR_ATmega169A__) \
|| defined(__AVR_ATmega169P__) \
|| defined(__AVR_ATmega169PA__) \
|| defined(__AVR_ATmega329A__) \
|| defined(__AVR_ATmega329PA__) \
|| defined(__AVR_ATmega3290A__) \
|| defined(__AVR_ATmega3290PA__) \
|| defined(__AVR_ATmega649A__) \
|| defined(__AVR_ATmega649P__) \
|| defined(__AVR_ATmega6490A__) \
|| defined(__AVR_ATmega6490P__) \
|| defined(__AVR_ATmega165__) \
|| defined(__AVR_ATmega169__) \
|| defined(__AVR_ATmega48__) \
|| defined(__AVR_ATmega88__) \
|| defined(__AVR_ATmega168__) \
|| defined(__AVR_ATmega325P__) \
|| defined(__AVR_ATmega3250P__) \
|| defined(__AVR_ATmega325__) \
|| defined(__AVR_ATmega3250__) \
|| defined(__AVR_ATmega645__) \
|| defined(__AVR_ATmega6450__) \
|| defined(__AVR_ATmega329__) \
|| defined(__AVR_ATmega329P__) \
|| defined(__AVR_ATmega3290__) \
|| defined(__AVR_ATmega3290P__) \
|| defined(__AVR_ATmega649__) \
|| defined(__AVR_ATmega6490__) \
|| defined(__AVR_AT90CAN128__) \
|| defined(__AVR_AT90CAN32__) \
|| defined(__AVR_AT90CAN64__) \
|| defined(__AVR_ATA6612C__) \
|| defined(__AVR_ATA6613C__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_XMEGA__)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(SLEEP_SMODE2_bm | SLEEP_SMODE1_bm | SLEEP_SMODE0_bm)) | (mode)); \
} while(0)
#elif defined(__AVR_AT90SCR100__) \
|| defined(__AVR_ATmega8U2__) \
|| defined(__AVR_ATmega16U2__) \
|| defined(__AVR_ATmega32U2__) \
|| defined(__AVR_AT90USB162__) \
|| defined(__AVR_AT90USB82__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
#define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2))
#define SLEEP_MODE_EXT_STANDBY (_BV(SM0) | _BV(SM1) | _BV(SM2))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_ATA6285__) \
|| defined(__AVR_ATA6286__) \
|| defined(__AVR_ATA6289__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_SENSOR_NOISE_REDUCTION (_BV(SM0))
#define SLEEP_MODE_PWR_DOWN (_BV(SM1))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined (__AVR_ATA5790__) \
|| defined (__AVR_ATA5790N__) \
|| defined (__AVR_ATA5795__) \
|| defined (__AVR_ATA5782__) \
|| defined (__AVR_ATA5831__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_EXT_PWR_SAVE (_BV(SM0))
#define SLEEP_MODE_PWR_DOWN (_BV(SM1))
#define SLEEP_MODE_PWR_SAVE (_BV(SM1) | _BV(SM0))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined (__AVR_ATA5702M322__)
#define SLEEP_MODE_IDLE (0)
#define SLEEP_MODE_EXT_PWR_SAVE (_BV(SM0))
#define SLEEP_MODE_PWR_DOWN (_BV(SM1))
#define SLEEP_MODE_PWR_SAVE (_BV(SM1) | _BV(SM0))
#define SLEEP_MODE_EXT_PWR_DOWN (_BV(SM2))
#define SLEEP_MODE_PWR_OFF (_BV(SM2) | _BV(SM0))
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#elif defined(__AVR_ATtiny4__) \
|| defined(__AVR_ATtiny5__) \
|| defined(__AVR_ATtiny9__) \
|| defined(__AVR_ATtiny10__) \
|| defined(__AVR_ATtiny20__) \
|| defined(__AVR_ATtiny40__)
#define SLEEP_MODE_IDLE 0
#define SLEEP_MODE_ADC _BV(SM0)
#define SLEEP_MODE_PWR_DOWN _BV(SM1)
#define SLEEP_MODE_STANDBY _BV(SM2)
#define set_sleep_mode(mode) \
do { \
_SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
} while(0)
#else
#error "No SLEEP mode defined for this device."
#endif
#if defined(__DOXYGEN__)
extern void sleep_enable (void);
#else
#define sleep_enable() \
do { \
_SLEEP_CONTROL_REG |= (uint8_t)_SLEEP_ENABLE_MASK; \
} while(0)
#endif
#if defined(__DOXYGEN__)
extern void sleep_disable (void);
#else
#define sleep_disable() \
do { \
_SLEEP_CONTROL_REG &= (uint8_t)(~_SLEEP_ENABLE_MASK); \
} while(0)
#endif
#if defined(__DOXYGEN__)
extern void sleep_cpu (void);
#else
#define sleep_cpu() \
do { \
__asm__ __volatile__ ( "sleep" "\n\t" :: ); \
} while(0)
#endif
#if defined(__DOXYGEN__)
extern void sleep_mode (void);
#else
#define sleep_mode() \
do { \
sleep_enable(); \
sleep_cpu(); \
sleep_disable(); \
} while (0)
#endif
#if defined(__DOXYGEN__)
extern void sleep_bod_disable (void);
#else
#if defined(BODS) && defined(BODSE)
#ifdef BODCR
#define BOD_CONTROL_REG BODCR
#else
#define BOD_CONTROL_REG MCUCR
#endif
#define sleep_bod_disable() \
do { \
uint8_t tempreg; \
__asm__ __volatile__("in %[tempreg], %[mcucr]" "\n\t" \
"ori %[tempreg], %[bods_bodse]" "\n\t" \
"out %[mcucr], %[tempreg]" "\n\t" \
"andi %[tempreg], %[not_bodse]" "\n\t" \
"out %[mcucr], %[tempreg]" \
: [tempreg] "=&d" (tempreg) \
: [mcucr] "I" _SFR_IO_ADDR(BOD_CONTROL_REG), \
[bods_bodse] "i" (_BV(BODS) | _BV(BODSE)), \
[not_bodse] "i" (~_BV(BODSE))); \
} while (0)
#endif
#endif
#endif