Timer1 Gate Source Selection

The gate source for Timer1 is selected using the GSS bits. The polarity selection for the gate source is controlled by the GPOL bit. The table below lists the gate source selections.

Table 1. Timer Gate Signal Selection
GSS Gate Source
Timer1 Timer3 Timer5 Timer7
11111-10111 Reserved Reserved Reserved Reserved
10110 ZCDOUT ZCDOUT ZCDOUT ZCDOUT
10101 CMP3OUT CMP3OUT CMP3OUT CMP3OUT
10100 CMP2OUT CMP2OUT CMP2OUT CMP2OUT
10011 CMP1OUT CMP1OUT CMP1OUT CMP1OUT
10010 PWM7OUT PWM7OUT PWM7OUT PWM7OUT
10001 PWM6OUT PWM6OUT PWM6OUT PWM6OUT
10000 CCP5OUT CCP5OUT CCP5OUT CCP5OUT
01111 CCP4OUT CCP4OUT CCP4OUT CCP4OUT
01110 CCP3OUT CCP3OUT CCP3OUT CCP3OUT
01101 CCP2OUT CCP2OUT CCP2OUT CCP2OUT
01100 CCP1OUT CCP1OUT CCP1OUT CCP1OUT
01101 SMT2 overflow SMT2 overflow SMT2 overflow SMT2 overflow
01010 SMT1 overflow SMT1 overflow SMT1 overflow SMT1 overflow
01001 TMR8OUT (post-scaled) TMR8OUT (post-scaled) TMR8OUT (post-scaled) TMR8OUT (post-scaled)
01000 TMR7 overflow TMR7 overflow TMR7 overflow Reserved
00111 TMR6OUT (post-scaled) TMR6OUT (post-scaled) TMR6OUT (post-scaled) TMR6OUT (post-scaled)
00110 TMR5 overflow TMR5 overflow Reserved TMR5 overflow
00101 TMR4OUT (post-scaled) TMR4OUT (post-scaled) TMR4OUT (post-scaled) TMR4OUT (post-scaled)
00100 TMR3 overflow Reserved TMR3 overflow TMR3 overflow
00011 TMR2OUT (post-scaled) TMR2OUT (post-scaled) TMR2OUT (post-scaled) TMR2OUT (post-scaled)
00010 Reserved TMR1 overflow TMR1 overflow TMR1 overflow
00001 TMR0 overflow TMR0 overflow TMR0 overflow TMR0 overflow
00000 Pin selected by T1GPPS Pin selected by T3GPPS Pin selected by T5GPPS Pin selected by T7GPPS

Any of the above mentioned signals can be used to trigger the gate. The output of the CMPx can be synchronized to the Timer1 clock or left asynchronous. For more information refer to the Comparator Output Synchronization section.