Register Summary - SMT Control

Offset Name Bit Pos.                

0x00

...

0x0EF7

 Reserved                  
0x0EF8 SMT2TMR 7:0 TMRL[7:0]
15:8 TMRH[7:0]
23:16 TMRU[7:0]
0x0EFB SMT2CPR 7:0 CPRL[7:0]
15:8 CPRH[7:0]
23:16 CPRU[7:0]
0x0EFE SMT2CPW 7:0 CPWL[7:0]
15:8 CPWH[7:0]
23:16 CPWU[7:0]
0x0F01 SMT2PR 7:0 PRL[7:0]
15:8 PRH[7:0]
23:16 PRU[7:0]
0x0F04 SMT2CON0 7:0 EN   STP WPOL SPOL CPOL PS[1:0]
0x0F05 SMT2CON1 7:0 GO REPEAT     MODE[3:0]
0x0F06 SMT2STAT 7:0 CPRUP CPWUP   RST   TS WS AS
0x0F07 SMT2CLK 7:0           CSEL[2:0]
0x0F08 SMT2SIG 7:0       SSEL[4:0]
0x0F09 SMT2WIN 7:0       WSEL[4:0]
0x0F0A SMT1TMR 7:0 TMRL[7:0]
15:8 TMRH[7:0]
23:16 TMRU[7:0]
0x0F0D SMT1CPR 7:0 CPRL[7:0]
15:8 CPRH[7:0]
23:16 CPRU[7:0]
0x0F10 SMT1CPW 7:0 CPWL[7:0]
15:8 CPWH[7:0]
23:16 CPWU[7:0]
0x0F13 SMT1PR 7:0 PRL[7:0]
15:8 PRH[7:0]
23:16 PRU[7:0]
0x0F16 SMT1CON0 7:0 EN   STP WPOL SPOL CPOL PS[1:0]
0x0F17 SMT1CON1 7:0 GO REPEAT     MODE[3:0]
0x0F18 SMT1STAT 7:0 CPRUP CPWUP   RST   TS WS AS
0x0F19 SMT1CLK 7:0           CSEL[2:0]
0x0F1A SMT1SIG 7:0       SSEL[4:0]
0x0F1B SMT1WIN 7:0       WSEL[4:0]