Computation Operation

The ADC module hardware is equipped with post conversion computation features. These features provide data post-processing functions that can be operated on the ADC conversion result, including digital filtering/averaging and threshold comparison functions.

Figure 1. Computational Features Simplified Block Diagram
The operation of the ADC computational features is controlled by the ADMD bits.

The module can be operated in one of five modes:

The five modes are summarized in the following table.

Table 1. Computation Modes
    Register Clear Event Value after Cycle(2) Completion Threshold Operations Value at ADTIF Interrupt
Mode ADMD ADACC and ADCNT ADACC(1) ADCNT Retrigger Threshold Test Interrupt ADAOV ADFLTR ADCNT
Basic 0 ADACLR = 1 Unchanged Unchanged No Every Sample If threshold=true N/A N/A count
Accumulate 1 ADACLR = 1 S1 + ADACC

or

(S2-S1) + ADACC

If (ADCNT=FF): ADCNT, otherwise: ADCNT+1 No Every Sample If threshold=true ADACC Overflow ADACC/2ADCRS count
Average 2 ADACLR = 1 or ADCNT>=ADRPT at ADGO or retrigger S1 + ADACC

or

(S2-S1) + ADACC

If (ADCNT=FF): ADCNT, otherwise: ADCNT+1 No If ADCNT>=ADRPT If threshold=true ADACC Overflow ADACC/2ADCRS count
Burst

Average

3 ADACLR = 1 or ADGO set or retrigger Each repetition: same as Average

End with sum of all

samples

Each repetition: same as Average

End with ADCNT=ADRPT

Repeat while ADCNT<ADRPT If ADCNT>=ADRPT If threshold=true ADACC Overflow ADACC/2ADCRS ADRPT
Low-pass Filter 4 ADACLR = 1 S1+ADACC-ADACC/
2ADCRS

or

(S2-S1)+ADACC-ADACC/2ADCRS

If (ADCNT=FF): ADCNT, otherwise: ADCNT+1 No If ADCNT>=ADRPT If threshold=true ADACC Overflow Filtered Value count
Note:
  1. 1.S1 and S2 are abbreviations for Sample 1 and Sample 2, respectively. When ADDSEN = 0, S1 = ADRES; When ADDSEN = 1, S1 = ADPREV and S2 = ADRES.
  2. 2.When ADDSEN = 0 then Cycle means one conversion. When ADDSEN = 1 the Cycle means two conversions.