In 8-bit mode (which is the default), an overflow in the TMR0
register (FFh → 00h) will set flag bit, TMR0IF. In 16-bit mode, an overflow in the
TMR0H:TMR0L register pair (FFFFh → 0000h) will set TMR0IF. The interrupt can be
enabled/disabled by setting/clearing enable bit,
TMR0IE. Interrupt priority for Timer0 is determined by the value contained in the
interrupt priority bit,
TMR0IP. See
“Timer0 Module” for further details
on the Timer0 module.