Timer1 Module with Gate Control

Timer1 module is a 16-bit timer/counter with the following features:

Important: References to module Timer1 apply to all the odd numbered timers on this device.
Figure 1. Timer1 Block Diagram
Note:
  1. 1.This signal comes from the pin seleted by TxCKIPPS.
  2. 2.TMRx register increments on rising edge.
  3. 3.Synchronize does not operate while in Sleep.
  4. 4.See TMRxCLK for clock source selections.
  5. 5.See TMRxGATE for gate source selection.
  6. 6.Synchronized comparator output should not be used in conjunction with synchronized input clock.