Reference Control

Name:
REFCTRL
Offset:
0x02 [ID-0000120e]
Reset:
0x00
Access:
PAC Write-Protection, Enable-Protected
Bit76543210
REFCOMPREFSEL[3:0]
AccessR/WR/WR/WR/WR/W
Reset00000

Bit 7 – REFCOMP: Reference Buffer Offset Compensation Enable

Reference Buffer Offset Compensation Enable

The gain error can be reduced by enabling the reference buffer offset compensation. This will decrease the input impedance and thus increase the start-up time of the reference.

ValueDescription
0 Reference buffer offset compensation is disabled.
1 Reference buffer offset compensation is enabled.

Bits 3:0 – REFSEL[3:0]: Reference Selection

Reference Selection

These bits select the reference for the ADC.

ValueNameDescription
0x0 INTREF internal variable reference voltage
x01 INTVCC0 1/1.6 VDDANA
0x2 INTVCC1 1/2 VDDANA (only for VDDANA > 2.0V)
0x3 VREFA External reference
0x4 VREFB External reference
0x5 INTVCC2 VDDANA
0x6 - 0xF   Reserved