Interrupt Enable Clear
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PLRDY | |||||||
Access | R/W | ||||||
Reset | 0 |
Performance Level Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the Performance Ready Interrupt Enable bit and the corresponding interrupt request.
Value | Description |
---|---|
0 | The Performance Ready interrupt is disabled. |
1 | The Performance Ready interrupt is enabled and will generate an interrupt request when the Performance Ready Interrupt Flag is set. |