Register Summary

Offset	Name	Bit Pos.
0x00	INTENCLR	7:0				OSC16MRDY				XOSCRDY
		15:8				DFLLRCS	DFLLLCKC	DFLLLCKF	DFLLOOB	DFLLRDY
		23:16					DPLLLDRTO	DPLLLTO	DPLLLCKF	DPLLLCKR
		31:24
0x04	INTENSET	7:0				OSC16MRDY				XOSCRDY
		15:8				DFLLRCS	DFLLLCKC	DFLLLCKF	DFLLOOB	DFLLRDY
		23:16					DPLLLDRTO	DPLLLTO	DPLLLCKF	DPLLLCKR
		31:24
0x08	INTFLAG	7:0				OSC16MRDY				XOSCRDY
		15:8				DFLLRCS	DFLLLCKC	DFLLLCKF	DFLLOOB	DFLLRDY
		23:16					DPLLLDRTO	DPLLLTO	DPLLLCKF	DPLLLCKR
		31:24
0x0C	STATUS	7:0				OSC16MRDY		CLKSW	CLKFAIL	XOSCRDY
		15:8				DFLLRCS	DFLLLCKC	DFLLLCKF	DFLLOOB	DFLLRDY
		23:16					DPLLLDRTO	DPLLLTO	DPLLLCKF	DPLLLCKR
		31:24
0x10	XOSCCTRL	7:0	ONDEMAND	RUNSTDBY				XTALEN	ENABLE
0x10	XOSCCTRL	15:8	STARTUP[3:0]				AMPGC	GAIN[2:0]
0x12 ... 0x13	Reserved
0x14	OSC16MCTRL	7:0	ONDEMAND	RUNSTDBY			FSEL[1:0]		ENABLE
0x15 ... 0x17	Reserved
0x18	DFLLCTRL	7:0	ONDEMAND	RUNSTDBY	USBCRM	LLAW	STABLE	MODE	ENABLE
0x18	DFLLCTRL	15:8					WAITLOCK	BPLCKC	QLDIS	CCDIS
0x1A ... 0x1B	Reserved
0x1C	DFLLVAL	7:0	FINE[7:0]
		15:8	COARSE[5:0]						FINE[9:8]
		23:16	DIFF[7:0]
		31:24	DIFF[15:8]
0x20	DFLLMUL	7:0	MUL[7:0]
		15:8	MUL[15:8]
		23:16	FSTEP[7:0]
		31:24	CSTEP[5:0]						FSTEP[9:8]
0x24	DFLLSYNC	7:0	READREQ
0x25 ... 0x27	Reserved
0x28	DPLLCTRLA	7:0	ONDEMAND	RUNSTDBY					ENABLE
0x29 ... 0x2B	Reserved
0x2C	DPLLRATIO	7:0	LDR[7:0]
		15:8					LDR[11:8]
		23:16					LDRFRAC[3:0]
		31:24
0x30	DPLLCTRLB	7:0			REFCLK[1:0]		WUF	LPEN	FILTER[1:0]
		15:8				LBYPASS		LTIME[2:0]
		23:16	DIV[7:0]
		31:24						DIV[10:8]
0x34	DPLLPRESC	7:0							PRESC[1:0]
0x35 ... 0x37	Reserved
0x38	DPLLSYNCBUSY	7:0					DPLLPRESC	DPLLRATIO	ENABLE
0x39 ... 0x3B	Reserved
0x3C	DPLLSTATUS	7:0							CLKRDY	LOCK