Address

Name:
ADDR
Offset:
0x24 [ID-00001bb3]
Reset:
0x00000000
Access:
PAC Write-Protection, Enable-Protected
Bit3130292827262524
ADDRMASK[9:7]
AccessR/WR/WR/W
Reset000
Bit2322212019181716
ADDRMASK[6:0]
AccessR/WR/WR/WR/WR/WR/WR/W
Reset0000000
Bit15141312111098
TENBITENADDR[9:7]
AccessR/WR/WR/WR/W
Reset0000
Bit76543210
ADDR[6:0]GENCEN
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 26:17 – ADDRMASK[9:0]: Address Mask

Address Mask

These bits act as a second address match register, an address mask register or the lower limit of an address range, depending on the CTRLB.AMODE setting.

Bit 15 – TENBITEN: Ten Bit Addressing Enable

Ten Bit Addressing Enable

ValueDescription
0 10-bit address recognition disabled.
1 10-bit address recognition enabled.

Bits 10:1 – ADDR[9:0]: Address

Address

These bits contain the I2C slave address used by the slave address match logic to determine if a master has addressed the slave.

When using 7-bit addressing, the slave address is represented by ADDR[6:0].

When using 10-bit addressing (ADDR.TENBITEN=1), the slave address is represented by ADDR[9:0]

When the address match logic detects a match, INTFLAG.AMATCH is set and STATUS.DIR is updated to indicate whether it is a read or a write transaction.

Bit 0 – GENCEN: General Call Address Enable

General Call Address Enable

A general call address is an address consisting of all-zeroes, including the direction bit (master write).

ValueDescription
0 General call address recognition disabled.
1 General call address recognition enabled.