Interrupt Flag Status and Clear in COUNT16 mode (CTRLA.MODE=1)
Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
OVF | CMPn[1:0] | ||||||
AccessR/W | R/W | R/W | |||||
Reset0 | 0 | 0 | |||||
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PERn[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Overflow
This flag is cleared by writing a '1' to the flag.
This flag is set on the next CLK_RTC_CNT cycle after an overflow condition occurs, and an interrupt request will be generated if INTENCLR/SET.OVF is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the Overflow interrupt flag.
Compare n [n = 1..0]
This flag is cleared by writing a '1' to the flag.
This flag is set on the next CLK_RTC_CNT cycle after a match with the compare condition, and an interrupt request will be generated if INTENCLR/SET.COMPx is one.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the Compare n interrupt flag.
Periodic Interval n [n = 7..0]
This flag is cleared by writing a '1' to the flag.
This flag is set on the 0-to-1 transition of prescaler bit [n+2], and an interrupt request will be generated if INTENCLR/SET.PERx is one.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the Periodic Interval n interrupt flag.