PATT

Pattern

Name:: PATT
Offset:: 0x38 [ID-00002e48]
Reset:: 0x0000
Access:: Write-Synchronized, Read-Synchronized

Bit15	14	13	12	11	10	9	8
PGV7	PGV6	PGV5	PGV4	PGV3	PGV2	PGV1	PGV0
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0
Bit7	6	5	4	3	2	1	0
PGE7	PGE6	PGE5	PGE4	PGE3	PGE2	PGE1	PGE0
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0

Bits 8, 9, 10, 11, 12, 13, 14, 15 – PGV: Pattern Generation Output Value

Pattern Generation Output Value

This register holds the values of pattern for each waveform output.

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PGE: Pattern Generation Output Enable

Pattern Generation Output Enable

This register holds the enable status of pattern generation for each waveform output. A bit written to '1' will override the corresponding SWAP output with the corresponding PGVn value.