Channel ID
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ID[3:0] | |||||||
Access | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 |
Channel ID
These bits define the channel number that will be affected by the channel registers (CH*). Before reading or writing a channel register, the channel ID bit group must be written first.