Interrupt Enable Set

This register allows the user to enable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Set register (INTENCLR).
Name:
INTENSET
Offset:
0x09 [ID-00000a18]
Reset:
0x00
Access:
PAC Write-Protection
Bit76543210
ERR
AccessR/W
Reset0

Bit 0 – ERR: Peripheral Access Error Interrupt Enable

Peripheral Access Error Interrupt Enable

This bit indicates that the Peripheral Access Error Interrupt is enabled and an interrupt request will be generated when one of the interrupt flag registers bits (INTFLAGAHB, INTFLAGn) is set:

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Peripheral Access Error interrupt Enable bit and enables the corresponding interrupt request.

ValueDescription
0 Peripheral Access Error interrupt is disabled.
1 Peripheral Access Error interrupt is enabled.