Event Control
Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
Access | |||||||
Reset | |||||||
Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Access | |||||||
Reset | |||||||
Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
EXTINTEO[15:8] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
EXTINTEO[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
External Interrupt x Event Output
These bits enable the event associated with the EXTINTx pin.
Value | Description |
---|---|
0 | Event from pin EXTINTx is disabled. |
1 | Event from pin EXTINTx is enabled and will be generated when EXTINTx pin matches the external interrupt sensing configuration. |