Interrupt Enable Clear
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MCx | MCx | ERR | OVF | ||||
Access | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 |
Error Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the Error Interrupt Enable bit, which disables the Error interrupt.
Value | Description |
---|---|
0 | The Error interrupt is disabled. |
1 | The Error interrupt is enabled. |
Overflow Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the Overflow Interrupt Enable bit, which disables the Overflow interrupt request.
Value | Description |
---|---|
0 | The Overflow interrupt is disabled. |
1 | The Overflow interrupt is enabled. |
Match or Capture Channel x Interrupt Enable [x = 1..0]
Writing a '0' to these bits has no effect.
Writing a '1' to MCx will clear the corresponding Match or Capture Channel x Interrupt Enable bit, which disables the Match or Capture Channel x interrupt.
Value | Description |
---|---|
0 | The Match or Capture Channel x interrupt is disabled. |
1 | The Match or Capture Channel x interrupt is enabled. |